Mentor Graphics Teams with Simpod
Delivers DeskPOD Physical Model Support for Seamless Hardware/Software Co-Verification Tool
WILSONVILLE, Ore., July 19, 1999 - Mentor Graphics Corporation (NASDAQ: MENT) and Simpod Inc. today announced that the companies will join forces to expand the number of processors supported by Mentor Graphics' industry-leading SeamlessTM hardware/software co-verification environment. This powerful collaboration integrates the Simpod DeskPODTM hardware with the Seamless Co-VerificationTM Environment. As a result, the hardware processor models supported by DeskPOD are available within the Seamless environment, supplementing the extensive range of existing CPU and DSP software models, and further expanding on the industry's most comprehensive environment for hardware/software co-verification.
Mentor Graphics and Simpod are delivering the first solution that provides co-verification support across a full spectrum of processors from proprietary, specialty devices to the most complex commercial CPUs and DSPs. Incorporating actual silicon devices with the DeskPOD technology gives designers the ability to utilize the physical device to quickly create a fast, accurate co-verification model that can validate their systems in a fraction of the time of competitive solutions. Semiconductor designers have the capability to rapidly design chips for the newest generation of telecommunications, data communications and consumer electronics appliances.
"DeskPOD and Seamless are a powerful combination that surpass other co-verification offerings," said Yiftach Tzori, president and chief technical officer of Simpod, Inc. "The DeskPOD hardware modeler technology and Seamless co-verification environment have been tightly integrated to deliver very accurate and high-performance models."
"The DeskPODDeskPOD architecture is uniquely qualified to deliver the benefits of hardware modeling to the industry leading Seamless co-verification environment," said Mitch Weaver, general manager of Mentor Graphics' Co-Design Business Unit. "This innovative integration gives the user access to the full feature set of Seamless combined with the high level of performance and accuracy of a DeskPOD hardware model."
Competitive co-verification offerings mixing hardware models with software simulation have placed prohibitive restrictions on the designer. Typically they have had access to only a limited sub-set of the pins on the hardware model, and have been unable to utilize the flexibility of a software solution.
Integrating the patented Seamless technology with DeskPOD overcomes these restrictions. The designer has access to all the signals on the device, giving them full visibility in the logic simulator and debugger. DeskPOD has been integrated with Seamless' patented Coherent Memory Server technology, allowing the designer to dynamically select how program code and data are accessed as the simulation progresses. This gives the user the flexibility to chose between detailed simulation or rapid execution of each interaction between the processor and the external hardware thus enabling the fastest time to insight in the debug of complex embedded systems.
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